Design of Multiplier and Divider Using Reversible Logic Gates with Vedic Mathematical Approach Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: G. Radhika, D.R.V.A.Sharath Kumar Subject(s): Engineering, Applied Linguistics
Performance Analysis Of Vedic Multiplier Using Reversible Logic In Spartan 6 Journal title: International Journal of Research in Computer and Communication Technology Authors: T Nagaveer, M Neelima, VNM Brahmanandam Subject(s): Computer and Information Science, Telecommunications
Power-Time Efficient Algorithm for Computing Reconfigurable FFT in Wireless Sensor Network Journal title: International Journal of Computer Science & Engineering Technology Authors: Anuj Kumar Varshney , Vrinda Gupta Subject(s):
A NOVEL ARCHITECTURE FOR INVERSE MIX COLUMNS OPERATION IN AES USING VEDIC MATHEMATICS Journal title: International Journal of Engineering Sciences & Research Technology Authors: Shrita G, Basavaraj SM Subject(s):
An Improved Squaring Circuit for Binary Numbers Journal title: International Journal of Advanced Computer Science & Applications Authors: Kabiraj Sethi , Rutuparna Panda Subject(s):
Performance Analysis of Various Vedic Techniques for Multiplication Journal title: INTERNATIONAL JOURNAL OF ENGINEERING TRENDS AND TECHNOLOGY Authors: Kavita#1, Umesh Goyal#2 Subject(s):
A Novel Approach to Implement a Vedic Multiplier for High Speed Applications Journal title: INTERNATIONAL JOURNAL OF ENGINEERING TRENDS AND TECHNOLOGY Authors: Dasari Sireesha , N.Suresh Babu Subject(s):
Simulation & Implementation of Complex Multiplier using Vedic Mathematics Journal title: International journal of Emerging Trends in Science and Technology Authors: Aruna. M Subject(s):
VHDL implementation of a Novel Low Power Squaring Circuit Using YTVY Algorithm of Vedic Mathematics Journal title: International journal of Emerging Trends in Science and Technology Authors: Pabitra Kumar Mohapatra Subject(s):
VEDIC MATHEMATICS Journal title: Human Research in Rehabilitation Authors: Sead Rešić, Adin Lemo Subject(s): Humanities, Law, Social Sciences
Design of Low Power Vedic Multiplier Based on Reversible Logic Journal title: International Journal of engineering Research and Applications Authors: Sagar ., K Suresh Babu Subject(s):
Review on Multiply-Accumulate Unit Journal title: International Journal of engineering Research and Applications Authors: Roshani Pawar, Dr. S. S. Shriramwar Subject(s):
Design And Implementation Of High Speed Vedic Multiplier Journal title: International Journal of engineering Research and Applications Authors: Hitansu Sekhar Sahu, Khirod Kumar Sethi, Tejesh Kumar Chaudhary, Hemant Kumar Besra, Prasanta Kumar... Subject(s):
